1. Field of the Invention
The present invention relates to acquisition of voltage measurements with a photoconductive sampling probe.
2. The Prior Art
A prior-art sampling probe has a contact tip and a high-impedance photoconductive gate fabricated as an electrode structure on a substrate. To sample voltages on a conductor of a device under test (DUT), the contact tip is applied to the conductor and an optical probe laser beam is pulsed to close the gate. See J. KIM et al., Photoconductive sampling probe with 2.3-ps temporal resolution and 4 xcexcV sensitivity, APPL. PHYS. LETT. 62(18), May 3, 1993, pp. 2268-2270. A system employing such a probe is described in U.S. Pat. No. 5,317,256 dated May 31, 1996 to Williamson. See also U.S. Pat. No. 5,331,275 dated Jul. 19, 1994 to Ozaki et al., and U.S. Pat. No. 5,442,300 dated Aug. 15, 1995 to Nees et al.
In an ideal photoconductive (PC) switch, the dark-resistance (when the laser pulse is off) is infinite, so that the rest of the sampling circuit is electrically connected to the DUT only when the laser pulse is on. For such an ideal PC switch, one operating method is to keep the output side of the PC switch at a fixed voltage (say 0 V) and to measure the net charge passed by the switch over an entire trigger period, where the trigger period is the product of the length of a repetitive stimulus-signal loop applied to the DUT and the clock period of the loop. A simple calibration allows this net charge to be interpreted as voltage.
FIG. 1 shows an equivalent-circuit view of an ideal prior-art PC sampling system. The DUT is represented as a voltage source 100 connected to the input terminal of a PC switch 105 which has a resistance 110 when closed of some value Ron, such as 50 kxcexa9. The current Ipc through PC switch 105 and resistance 110 Ron is applied to the input of a current-to-voltage converter made up of a differential amplifier 115 and a feedback resistance 120 having a value R. The converter output voltage is thus Vout=Rxc2x7Ipc.
FIG. 2 illustrates. A trigger pulse occurs once for each repetition of a stimulus-signal pattern applied to the DUT, as shown in line 200. A laser sampling pulse is produced at some time after the trigger pulse as shown in line 205. The ideal PC switch responds to the laser sampling pulse by changing resistance from Roff=∞ to Ron=50 kxcexa9, as shown in line 210. Voltage on a conductor of the DUT to be sampled is shown at line 215. The result of closing the PC switch in response to the laser sampling pulse is a signal Vout, as shown in line 220. The integral under Vout for each optical sampling pulse is proportional to the sampled DUT voltage.
In practice, it has been observed that although the equilibrium dark-resistance of the PC switch Roff is usually greater than several hundred megohms, the xe2x80x9cdark-resistancexe2x80x9d Roff is much lower immediately following a laser pulse. In one experiment, the dark-resistance Roff was found to be approximately 50 Mxcexa9 for a few microseconds following a laser pulse. This xe2x80x9cpersistent photoconductivityxe2x80x9d (PPC) effect will cause the net charge through the PC switch to be contaminated by the DUT voltage acting through the reduced dark-resistance Roff for a few microseconds following the laser pulse, whereas accurate measurement demands that the net charge passed by the PC switch be sensitive only to the DUT voltage during the laser pulse interval.
An equivalent circuit is shown in FIG. 3. At a laser pulse repetition rate of 500 KHz, rather than having an infinite resistance when open, the PC switch is found to have a dark-resistance 300 of Roff=50 Mxcexa9. FIG. 4 illustrates. A trigger pulse occurs once for each repetition of a stimulus-signal pattern applied to the DUT, as shown in line 400. A laser sampling pulse is produced at some time after the trigger pulse as shown in line 405. The non-ideal PC switch of FIG. 3 responds to the laser sampling pulse by changing resistance from Roff=50 Mxcexa9 to Ron=50 kxcexa9 as shown in line 410.
A first example of voltage VDUT1 on a conductor of the DUT to be sampled is shown at line 415xe2x80x94in this example, the voltage is at a high level during much of the interval between trigger pulses, except for a negative-going pulse 435 just prior to the laser sampling pulse 440. Closing the PC switch in response to the laser sampling pulse results in a signal Vout1, as shown in line 420. A second example of voltage VDUT2 on a conductor of the DUT to be sampled is shown at line 425xe2x80x94in this example, the voltage is at a low level during the interval between trigger pulses. Closing the PC switch in response to the laser sampling pulse results in a signal Vout2, as shown in line 430. The differences between lines 420 and 430 illustrate a problem with PC switch leakage. The integrated areas under Vout1 and Vout2 are not identical, even though the voltages VDUT1 and VDUT2 are the same at the sampling point.
PC switches also have other non-ideal characteristics which can lead to measurement errors. These include non-linear on-resistance (the conduction current saturates at high bias voltages) and temperature sensitivity. When the effect of the dark-resistance can be neglected, it is simple to avoid such errors: a hold-capacitor is charged up through the PC switch, so that when the voltage on the capacitor has reached equilibrium, that voltage is exactly equal to the DUT voltage at the time of the laser pulse, irrespective of non-linear on-resistances or temperature variations.
FIG. 5 shows an equivalent-circuit of a hold-capacitor sampling system for absolute voltage measurement with an ideal PC switch. The DUT is represented as a voltage source 500 connected to the input terminal of a PC switch 505 which has a resistance 510 when closed of Ron. The current Ipc through PC switch 505 and resistance 510 Ron is applied to a hold-capacitor Chold which is connected across the input terminals of a high-impedance amplifier 520. Ideally, if leakage currents can be neglected, the voltage on Chold will charge exactly to the DUT voltage at the sampling point. The action of the hold-capacitor can be viewed as negative feedback. When the dark-resistance Roff cannot be neglected, such a simple system will give erroneous voltage measurements due to current flow through the dark-resistance.
In addition to the above-noted limitations, the operating voltage range of high impedance input stages is usually limited. There is thus a need for improved methods and circuits of photoconductive voltage sampling.
In accordance with an embodiment of the invention, methods of probing voltage comprise: establishing electrical connectivity between a DUT conductor to be probed and a photoconductive switch; during a sampling interval n, applying a laser pulse to the photoconductive switch while applying a voltage to the photoconductive switch terminal that is not connected to the DUT, corresponding to a voltage sample taken during a prior sampling interval nxe2x88x921, such that current flow through the photoconductive switch is dependent on any difference between voltage of the DUT conductor and the applied voltage; converting the current flow to a voltage signal; passing the voltage signal during a gating interval Telec; and sampling the passed voltage signal to produce a voltage sample for the sampling interval n.
A repetitive test pattern is applied to the conductor, and the sampling interval is synchronized with the repetitive test pattern. Converting the current flow to a voltage signal can comprise applying the current flow to a current-to-voltage converter having a rise time which is less than the gating interval Telec. The voltage signal can be passed only during the gating interval so that the voltage sample is insensitive to any leakage through the photoconductive switch outside of the gating interval. Passing the voltage signal during a gating interval can comprise applying the voltage signal to a first transistor Q1 of a differential pair of transistors Q1, Q2, applying a reference voltage to a second transistor Q2 of the differential pair of transistors, and controlling common emitter current of the differential pair of transistors with an electronic switch so as to pass the voltage signal when the electronic switch is closed. Sampling the voltage signal comprises applying the differential voltage signal from Q1, Q2 to an analog-to-digital converter and enabling the analog-to-digital converter to prepare a digital sample of the voltage signal representing the voltage on the conductor.
Also in accordance with an embodiment of the invention, apparatus for probing voltage on a conductor comprises: a photoconductive switch responsive to laser pulses; a probe tip for establishing electrical connectivity between a conductor to be probed and the photoconductive switch; a source for applying a laser pulse to the photoconductive switch during a sampling interval n; a circuit for applying to the photoconductive switch during the sampling interval n a voltage corresponding to a voltage estimate, VOUT, produced from prior samples, nxe2x88x921, nxe2x88x922, nxe2x88x923, etc., such that current flow through the photoconductive switch is dependent on any difference between the voltage of the conductor at sample interval n and the voltage estimate VOUT; a current-to-voltage converter for converting the current flow to a voltage signal; a gate for passing the voltage signal during a gating interval; and a sampling circuit for sampling the passed voltage signal to produce a voltage difference or voltage error sample for the sampling interval n, the voltage estimate Vout for sample n+1 being formed by the summation of the voltage estimate of this voltage error and Vout for sample n.
The apparatus can further comprise a timing circuit for synchronizing the sampling interval with a repetitive signal pattern appearing on the conductor. The current-to-voltage converter preferably has a rise time which is less than the gating interval. The gate preferably passes a voltage signal only during the gating interval Telec so that the voltage sample is insensitive to any leakage through the photoconductive switch outside of the gating interval. The gate preferably comprises a differential pair of transistors Q1, Q2, the voltage signal being applied to a first transistor Q1 of the differential pair and a reference voltage being applied to a second transistor Q2 of the differential pair, and the differential pair having common emitter current controlled by an electronic switch so as to pass the voltage signal when the electronic switch is closed. The sampling circuit preferably comprises an analog-to-digital converter for preparing a digital sample of the voltage signal representing the difference between VOUT at sampling interval nxe2x88x921 and the voltage on the conductor at sampling interval n. The output of this analog-to-digital converter is applied to digital summing device, the output of the summing device being a digital representation of VOUT to be used in the next sampling interval n+1. The output of the summing device is applied to the digital-to-analog converter to produce the new VOUT.
As noted above, the PPC effect leads to distortions in the measured waveform. This problem is addressed in accordance with embodiments of the present invention in the use of an electronically-gated measurement technique. In another aspect, the present invention provides a technique for increasing the input voltage range. These and other features of the invention will become apparent to those of skill in the art from the following description and the accompanying drawing figures.